74LVC32AD,118

74LVC32AD,118 is a quad 2-input OR gate. This device inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as translator in mixed 3.3V and 5V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. It complies with JEDEC standard (JESD8-7A (1.65V to 1.95 V), JESD8-5A (2.3V to 2.7V), JESD8-C/JESD36 (2.7V to 3.6V). It features ESD protection (HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V).

• Wide supply voltage range from 1.65V to 3.6V
• Overvoltage tolerant inputs to 5.5V
• Direct interface with TTL levels
• CMOS low power dissipation
• Input leakage current is ±0.1μA typ at (VCC = 3.6V;VI= 5.5V or GND, -40°C to +85°C)
• Supply current is 0.1μA typ at (VCC = 3.6V;VI=VCC or GND;IO = 0A, -40°C to +85°C)
• Input capacitance is 4pF typ at (VCC = 0V to 3.6V;VI=GND to VCC, -40°C to +85°C)
• Propagation delay is 4.2ns typical at (VCC = 1.65V to 1.95V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C
• SO14 package

Ostrzeżenia

Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.