ADSP-SC573BBCZ-4

ADSP-SC573BBCZ-4 is a SHARC+ dual-core DSP with ARM Cortex-A5. This SHARC processor is a member of the single-instruction, multiple data (SIMD) SHARC family of digital signal processors (DSPs) that feature Analog Devices Super Harvard Architecture. These 32bit/40- bit/64bit floating-point processors are optimized for high-performance audio/floating-point applications with a large on-chip static random-access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and innovative digital audio interfaces (DAI). New additions to the SHARC+ core include cache enhancements and branch prediction, while maintaining instruction set compatibility to previous SHARC products. Applications include security and protection, cryptographic hardware accelerators, fast secure boot with IP protection, support for ARM TrustZone, accelerators FIR, IIR offload engines, qualified for automotive applications.

• 450MHz max processor instruction rate, 450MHz max ARM instruction rate
• 1 ARM cores, 2 SHARC+ cores, 1 external memory ports
• Powerful DMA system, on-chip memory protection
• Byte, short word, word, long word addressed
• Dual-enhanced SHARC+ high performance floating-point cores
• 32bit, 40bit, and 64bit floating-point support, 32bit fixed point
• Large on-chip L2 SRAM with ECC protection, up to 1MB
• 500MHz/800 DMIPS with NEON/VFPv4-D16/Jazelle
• Operating temperature range from -40°C to +85°C
• Pad 400-Ball CSP-BGA package

Uwagi

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