LPC822M101JDH20J

The LPC822M101JDH20J is a 32-bit ARM Cortex-M0+ Microcontroller operating at CPU frequencies of up to 30MHz. The LPC82x support up to 32kB of flash memory and 8kB of SRAM. The peripheral complement of the LPC82x includes a CRC engine, four I²C-bus interfaces, up to three USARTs, up to two SPI interfaces, one multi-rate timer, self-wake-up timer and state-configurable timer with PWM function (SCTimer/PWM), a DMA, one 12-bit ADC and one analog comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine and up to 29 general-purpose I/O pins. State configurable timer (SCTimer/PWM) with input and output functions (including capture and match) for timing and PWM applications. Each SCTimer/PWM input is multiplexed to allow selecting from several input sources such as pins, ADC interrupt or comparator output.

• ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC) CPU
• System tick timer
• AHB multilayer matrix
• Serial wire debug (SWD) with four break points and two watch points
• JTAG boundary scan (BSDL) supported
• Up to 32kB on-chip flash programming memory with 64 byte page write and erase
• Code Read Protection (CRP) supported
• ROM API support boot loader, flash in-application programming (IAP) and in-system programming (ISP)
• High-current source output driver (20mA) on four pins
• Switch matrix for flexible configuration of each I/O pin function
• Analog peripherals - Comparator with four input pins and external or internal reference voltage
• Serial peripherals - Two SPI controllers with pin functions assigned through the switch matrix
• Clock generation - Crystal oscillator with an operating range of 1 to 25MHz
• Power control - Integrated PMU (power management unit) to minimize power consumption
• Unique device serial number for identification

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ESD sensitive device, take proper precaution while handling the device. Market demand for this product has caused an extension in leadtimes. Delivery dates may fluctuate. Product exempt from discounts.